cystech electronics corp. spec. no. : c607e3 issued date : 2007.03.07 revised date : 2014.03.03 page no. : 1/5 D45H11E3 cystek product specification low vcesat pnp epitaxial planar transistor D45H11E3 features ? low v ce (sat) ? high bv ceo ? excellent current gain characteristics ? pb-free lead plating package symbol outline D45H11E3 to-220ab b c e b base c collector e emitter ordering information device package shipping to-220 D45H11E3-0-ub-s (pb-free lead plating) 50 pcs / tube, 20 tubes/ box , 4 boxes/carton environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, ub : 50 pcs / tube, 20 tubes/box product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c607e3 issued date : 2007.03.07 revised date : 2014.03.03 page no. : 2/5 D45H11E3 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit collector-base voltage v cbo -80 v collector-emitter voltage v ceo -80 v emitter-base voltage v ebo -5 v collector current (dc) i c -10 collector current (pulse) i cp -20 (note 1) a power dissipation @ t a =25 p d 2 power dissipation @ t c =25 p d 50 w thermal resistance, junction to ambient r ja 62.5 c/w thermal resistance, junction to case r jc 2.5 c/w junction temperature tj 150 c storage temperature tstg -55~+150 c note : 1. single pulse , pw Q 380 s,duty Q 2%. characteristics (ta=25 c) symbol min. typ. max. unit test conditions bv ceo(sus) -80 - - v i c =-30ma, i b =0 i ceo - - -10 a v ce =-80v, i b =0 i ces - - -10 a v ce =-80v, v be =0 i ebo - - -50 a v eb =-5v, i c =0 *v ce(sat) - -0.6 -1.0 v i c =-8a, i b =-0.4a *v be(sat) - -1.0 -1.5 v i c =-8a, i b =-0.8a *h fe 60 - - - v ce =-1v, i c =-2a *h fe 40 - - - v ce =-1v, i c =-4a f t - 40 - mhz v ce =-10v, i c =-500ma, f=20mhz cob - 230 - pf v cb =-10v, f=1mhz *pulse test : pulse width 380 s, duty cycle 2%
cystech electronics corp. spec. no. : c607e3 issued date : 2007.03.07 revised date : 2014.03.03 page no. : 3/5 D45H11E3 cystek product specification typical characteristics current gain vs collector current 10 100 1000 1 10 100 1000 10000 collector current---ic(ma) current gain---hfe vce=1v vce=2v saturation voltage vs collector current 1 10 100 1000 10000 1 10 100 1000 10000 collector current---ic(ma) saturation voltage---(mv) ic=10ib vce(sat) ic=20ib ic=50ib saturation voltage vs collector current 100 1000 10000 1 10 100 1000 10000 collector current---ic(ma) saturation voltage---(mv) vbe(sat) @ ic=10ib on vottage vs collector current 100 1000 1 10 100 1000 10000 collector current---ic(ma) on voltage---(mv) vbe(on)@vce=1v power derating curve 0 0.5 1 1.5 2 2.5 0 50 100 150 200 ambient temperature---ta() power dissipation---pd(w) power derating curve 0 10 20 30 40 50 60 0 50 100 150 200 case temperature---tc() power dissipation---pd(w)
cystech electronics corp. spec. no. : c607e3 issued date : 2007.03.07 revised date : 2014.03.03 page no. : 4/5 D45H11E3 cystek product specification recommended wave soldering condition soldering time product peak temperature pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds 183 c 60-150 seconds time maintained above: ? temperature (t l ) 217 c ? time (t l ) 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c607e3 issued date : 2007.03.07 revised date : 2014.03.03 page no. : 5/5 D45H11E3 cystek product specification to-220 dimension *: typical millimeters marking: inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 4.470 4.670 0.176 0.184 e1 12.060 12.460 0.475 0.491 a1 2.520 2.820 0.099 0.111 e 2.540* 0.100* b 0.710 0.910 0.028 0.036 e1 4.980 5.180 0.196 0.204 b1 1.170 1.370 0.046 0.054 f 2.590 2.890 0.102 0.114 c 0.310 0.530 0.012 0.021 h 0.000 0.300 0.000 0.012 c1 1.170 1.370 0.046 0.054 l 13. 400 13.800 0.528 0.543 d 10.010 10.310 0.394 0.406 l1 3.560 3.960 0.140 0.156 e 8.500 8.900 0.335 0.350 3.735 3.935 0.147 0.155 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . style: pin 1.base 2.collector 3.emitter 4.collector 3-lead to-220 plastic package cystek package code: e3 d45h11 device name date code 1 2 3
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